Nowadays, while technology related to mobile devices develops, the mobile devices are formed in a small size and a light weight. In order to form such a mobile device in a small size, it is essential that a battery has a large quantity and an integrated circuit device forming a mobile device consumes low power.
In order for the integrated circuit device to consume low power, when driving an integrated circuit, by grasping an element that wastes power, it is necessary to minimize waste power. By finding the wasted element, in order for the integrated circuit device to consume low power, a process of estimating a power consumption amount according to a user scenario is preceded.
In order to describe a power consumption amount estimation process of the integrated circuit device, an integrated circuit development operation is roughly described. An integrated circuit is designed via an architecture design of the integrated circuit, a register transfer level (RTL) design that subdivides the architecture on a block basis, a gate design and a logic circuit design, a block disposition design, a layout design, and a simulation process of performing timing and power wiring simulation. In this case, when a low power design is available through accurate power consumption analysis at an architecture design operation, which an initial operation of integrated circuit development, a maximum effect can be expected with a minimum cost.
In order to describe a power consumption amount estimation process of the integrated circuit device, a module of constituting the integrated circuit device is roughly described. The integrated circuit device may be defined as a module based on a gate level, a register transfer level, or an electronic system level. In this case, in a system level, it is effective to perform power consumption analysis from a simulation speed viewpoint. However, there was a problem that technology of analyzing power consumption in a conventional system level deteriorates accuracy when depending on a developer's experience and comprehension on operation of an integrated circuit and extends a modeling generation time.